With semiconductor devices being more and more highly integrated in recent years, a region for device elements, that is, an active region is being reduced in size, and a channel of a MOS transistor formed in the active region is also being reduced in length. If a length of the channel of a MOS transistor is reduced, an electric field or electric potential in the channel region is more influenced by a source/drain voltage, which is referred to as a short channel effect. Further, with the scaling down of the active region, a width of the channel is also reduced so as to bring an increase in a threshold voltage, which is referred to as a narrow channel effect.
In particular, if there occurs the short channel effect in an access MOS transistor employed in a memory cell of a DRAM device, a threshold voltage of the DRAM cell is reduced, and a leakage current is increased, which results in deteriorating refresh characteristics of the DRAM device. Therefore, various efforts and studies have been actively made in order to optimize performances of devices while scaling down the elements formed on a substrate. As important examples, there have been introduced a vertical type transistor, such as a fin structure and a fully depleted lean-channel transistor (DELTA) structure, and a MOS transistor having a recessed gate electrode. The MOS transistor having the recessed gate electrode is formed by partially recessing a semiconductor substrate, forming a gate in the recessed portion, and forming a channel in the semiconductor substrate of the both sides of the gate. Thus, even though the integration of the semiconductor device is increased, the short channel effect of the MOS transistor can be suppressed by increasing the length of the channel. However, even though the MOS transistor having the recessed gate electrode is effective in suppressing the short channel effect by increasing the length of the channel, the structure of the MOS transistor may not be effective in preventing a narrow channel effect caused by the high integration of the device because a width of the channel remains unchanged.
U.S. Pat. No. 6,413,802 discloses a fin structure MOS transistor in which a plurality of thin parallel channel fins are formed between source/drain regions, and a gate electrode extends to the upper surface and sidewalls of a channel. In the fin structure MOS transistor, since the gate electrode is formed on both sidewalls of the channel fin, and the gate control is possible from the both sidewalls, a short channel effect can be decreased. However, the fin structure MOS transistor has a problem of increasing a source/drain junction capacitance while it has the advantage as above because the plural channel fins are formed in parallel along the width direction of the gate, and the spaces occupied by a channel region and source/drain regions are increased, thereby to increase the number of the channels.
An example of the DELTA structure MOS transistor is disclosed in U.S. Pat. No. 4,996,574. In the DELTA structure MOS transistor, a layer for a channel region in an active region is formed to vertically protrude with a predetermined width. Further, a gate electrode is formed to surround the vertically protruded channel region. Thus, a height of the protruded portion becomes a width of the channel, and a width of the protruded portion becomes a thickness of the channel layer. Since both sides of the protruded portion in the channel formed as above can all be used, the structure provides an effect of doubling the width of the channel, thereby preventing the narrow channel effect. Further, since depletion layers of the channel formed on the both sides are formed to overlap each other in the case of reducing the width of the protruded portion, a channel conductivity can be increased.
However, when the DELTA structure MOS transistor is employed to a bulk type silicon substrate, the substrate must be processed such that a portion for a channel in the substrate is protruded, and the substrate must be processed to be oxidized with the protruded portion covered by an oxidation barrier layer. At this time, if the oxidation is performed excessively, the channel and a substrate body may be separated because a part connecting the protruded portion for the channel and the substrate body is oxidized by the oxygen laterally diffused from the portion, which is not protected by the oxidation barrier layer. As such, if the channel and the substrate body are separated by the excessive oxidation, a thickness of the channel close to the connecting part is reduced, and a single crystal layer is damaged by the applied stress during the oxidation process.